diff --git a/src/main/kotlin/com/thequux/mcpdp/core/CPU.kt b/src/main/kotlin/com/thequux/mcpdp/core/CPU.kt
index 8ed5540..53a0bd6 100644
--- a/src/main/kotlin/com/thequux/mcpdp/core/CPU.kt
+++ b/src/main/kotlin/com/thequux/mcpdp/core/CPU.kt
@@ -731,7 +731,7 @@ class CPU(val mbus: MemBus, val tracer: ITracer = NullTracer()) {
         val mode = operand shr 3
         val reg = operand and 0x7
         val is_pc = reg == 7
-        val increment = if (byte_mode && !is_pc) 1U else 2U
+        val increment = if (byte_mode && reg < 6) 1U else 2U
         val decoded = 0x80_FFFFu and when (mode and 0x7) {
             0 -> reg.toUInt() bis PADDR_REG_BIT
             1 -> registers[reg].toUInt()