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• a155097903 Cleaned up order of writing condition codes and result of insns master TQ Hirsch 2023-10-14 14:40:08 +02:00
• b512f1a42f Fixed DATO/flag ordering for MOV. Still needs to be done for the rest of the insns TQ Hirsch 2023-09-30 20:12:53 +02:00
• ef5d8d73c7 Provided docs for running diagnostics TQ Hirsch 2023-09-30 19:46:36 +02:00
• d90304b5fd Makes it all the way through EKBB TQ Hirsch 2023-09-30 17:08:43 +02:00
• 6052c9a0c0 Got to end of test, but fails to successfully end test :-/ TQ Hirsch 2023-09-30 16:14:59 +02:00
• c8c8297765 Additional debugging aids, fixed Obi-Wan error in PLF check in MMU TQ Hirsch 2023-09-30 15:35:34 +02:00
• fa7108098b Fixed mapping of PAR/PDR registers (K/S were swapped), made DL11 disable interrupt when XCSR.4 cleared. This appears to fix all unexpected errors up to EKBB#67 TQ Hirsch 2023-09-30 13:46:01 +02:00
• 308e3a9efa Added CLI TQ Hirsch 2023-09-30 12:33:16 +02:00
• 3bbeaa9b8e Fixed SPL being executable without privilege TQ Hirsch 2023-09-30 11:31:46 +02:00
• 709eddc225 Working on debugging the PSW TQ Hirsch 2023-09-29 16:14:00 +02:00
• c2f38a4b50 Fixed memory map calculation; now gets completely through the test suite TQ Hirsch 2023-09-29 01:15:47 +02:00
• d5a36eac84 Started implementing page tables TQ Hirsch 2023-09-28 23:29:22 +02:00
• 846c7aad39 Fixed stack overflow emulation TQ Hirsch 2023-09-28 20:23:33 +02:00
• 473a12798e Mostly through stack yellow testing TQ Hirsch 2023-09-28 20:03:55 +02:00
• c5683a8383 New trap handling mechanism to support multiple trap causes in a single cycle TQ Hirsch 2023-09-28 17:27:40 +02:00
• 311fab9801 Started implementing stack limit register TQ Hirsch 2023-09-28 12:56:35 +02:00
• e015581b2e Show lights in xterm title TQ Hirsch 2023-09-27 17:59:46 +02:00
• 78dbcd8500 A bunch of fixes; gets all the way to test 26 TQ Hirsch 2023-09-27 17:54:06 +02:00
• dfeb859ac3 Fixed all ASH and ASHC tests in EKBB TQ Hirsch 2023-09-27 15:14:09 +02:00
• 1e994b3f69 Turns out ekbb failed due to insufficient memory :-/ TQ Hirsch 2023-09-27 12:18:18 +02:00
• 62e6987919 Fixed a misunderstanding of autoincrement/autodecrement mode; now EKBB prints its header message TQ Hirsch 2023-09-26 23:54:53 +02:00
• b8b356b8b3 Added new trace infrastructure TQ Hirsch 2023-09-26 20:56:04 +02:00
• d994f7f1ea Added EKBA and EKBB diags TQ Hirsch 2023-09-20 23:43:52 +02:00
• be1bf406a4 Misc tiny changes TQ Hirsch 2023-09-20 23:43:31 +02:00
• 3f85ee0603 25x speedup by moving to switch table TQ Hirsch 2023-09-20 11:34:46 +02:00
• f911a78d84 18% speedup from interrupt optimization TQ Hirsch 2023-09-20 10:44:24 +02:00
• 7556dca4f6 Successfully runs EKBA TQ Hirsch 2023-09-20 09:25:49 +02:00
• ac3496ed4f Seems to get through tests, but never prints completion message TQ Hirsch 2023-09-19 23:43:29 +02:00
• 11f2eb8d35 Now gets through most of EKBA; fails test of T bit TQ Hirsch 2023-09-19 23:35:32 +02:00
• 82498e0c19 Got another 40 insns into EKBA. Now at 247 TQ Hirsch 2023-09-19 23:11:06 +02:00
• aee3672252 Got 60 insns further in EKBA TQ Hirsch 2023-09-19 22:44:02 +02:00
• 20e57e3a19 Improved paging simulation, added disassembler TQ Hirsch 2023-09-19 22:08:47 +02:00
• 1bc7f93d57 Added rest of the CPU registers and logging TQ Hirsch 2023-09-18 14:40:23 +02:00
• 4c4be0aa40 A couple more CPU regs TQ Hirsch 2023-09-16 18:19:41 +02:00
• 9d2397d809 Started RL0x device, debugged failures in DZQKA TQ Hirsch 2023-09-16 14:17:56 +02:00
• 3bbc842277 Prevent overruns in DL11 TQ Hirsch 2023-09-14 00:15:58 +02:00
• d546b0c28e First try at allowing interrupts TQ Hirsch 2023-09-13 23:38:32 +02:00
• 79efc4e8d3 Miscellaneous hacking TQ Hirsch 2023-09-12 19:30:36 +02:00
• 83cccea9c7 Added misc notes TQ Hirsch 2023-09-12 15:39:38 +02:00
• 96038abeb1 Got it to the point that it can run a simple echo test TQ Hirsch 2023-09-12 15:39:13 +02:00
• 0d3dfb5a37 Many changes TQ Hirsch 2023-09-10 20:53:10 +02:00
• a1daa4c4b3 Fully implemented CPU and memory busses, but not yet tested TQ Hirsch 2023-08-31 13:46:28 +02:00
• 35736a5fd2 Initial commit TQ Hirsch 2023-08-28 14:00:07 +02:00